In two's complement representation, how is overflow detected when adding two integers?

• A. Overflow occurs when the signs of the operands differ.
• B. Overflow occurs when adding numbers with the same sign yields a result with a different sign.
• C. Overflow occurs when the MSB wraps to zero.
• D. Overflow is detected by a final carry out.

Answer: (B)

In two's complement, overflow means the true sum cannot be represented in the fixed number of bits, so the stored result has the wrong sign. This happens precisely when you add two numbers with the same sign and the result ends up with a different sign. For example, adding two positives can produce a negative result, or adding two negatives can produce a positive result—both are overflow. If the two operands have opposite signs, overflow cannot occur because the sum lies between their magnitudes and stays within the representable range. The final carry out is not a reliable indicator, and simply the MSB wrapping to zero isn’t the general rule for overflow. So the key idea is: overflow occurs when adding numbers of the same sign yields a result with a different sign.